Magnetic random access memory (MRAM) devices are being developed as an alternative to conventional semiconductor memory devices for many applications including information storage, wireless and wireline communications, and/or information processing. MRAM devices provide persistent (non-volatile) storage with relatively high densities.
MRAM memory cells represent stored data as different resistance values, and are often referred to as resistance-based memory cells because the logic state of data stored therein may be determined by measuring the resistance value of the MRAM memory cell. Example resistance-based memory cells may include, but are not limited to, spin-transfer-torque (STT) memory cells, spin-orbit-torque (SOT) memory cells, resistor random access memory (ReRAM), phase charge RAM, and/or carbon nanotube memory cells. By way of example, STT memory cells may store different logic states of data by changing the equivalent resistance of magnetic tunnel junction (MTJ) elements. During write operations, data may be programmed into a resistance-based memory cell by varying a current and/or a voltage driven through the memory cell, for example, to program the resistance-based memory cell to either a high impedance value or a low impedance value. During read operations, a controlled current may be driven through the resistance-based memory cell to determine an impedance value indicative of the logic state of data stored therein.
Electronic design automation (EDA) tools for designing conventional memories may include compilers and/or synthesis tools, which enable a user to specify parameters of the memory and to generate related design files. However, such EDA tools may be unable to accommodate the unique characteristics of magnetic and/or resistance-based memory cells. For one example, process variations inherent in the manufacture of semiconductor devices may cause resistance-based memory cells formed in different portions of a silicon wafer or die to have different equivalent resistances (such as before data is stored therein). For another example, temperature variations may cause uneven variations in equivalent resistances of resistance-based memory cells located in different portions of a memory array. Because resistance-based memory cells store data in terms of resistance, variations in equivalent resistances between the resistance-based memory cells in a memory array may cause erroneous data to be retrieved from the memory array during read operations.
Thus, it would be desirable for an EDA tool that can compensate for different resistance characteristics of resistance-based memory cells in a memory array.